1. Field of the Invention
The invention in general relates to static induction transistors and more particularly to a high power, high frequency static induction transistor.
2. Description of Related Art
A typical static induction transistor is a vertical structure device wherein active carriers flow from a source region to a drain region on opposite sides of a substrate member. Current flowing from source to drain is controlled by an electrostatic potential barrier induced by gate regions positioned on either side of the source region. The static induction transistor has a D.C. current-voltage (I-V) characteristic similar to a vacuum tube triode and is relatively linear over a wide range of drain current values.
In addition, as compared to lateral device structures, the vertical static induction transistor exhibits higher breakdown voltage due to reduced field crowding and surface breakdown may be controlled by the use of guard rings or field plates, by way of example.
As will be described, a portion of the semiconductor material of the static induction transistor is deposited upon a substrate by epitaxial growth techniques such as vapor phase epitaxy during which process intentional impurity atoms of a dopant are added, as desired, to produce layers with predetermined dopant levels and conductivities.
If the dopant level is made relatively high, then the device tends to exhibit reduced and non-linear voltage gain at certain low bias conditions. Conversely, if the dopant level is made relatively low, the maximum current and power output of the device tends to be limited.
The present invention provides for an improved static induction transistor which exhibits relatively high as well as uniform voltage gain but without any significant decrease in maximum output power.